CEA-Leti, the coordinator of the FAMES Pilot line, has achieved a major milestone for next-generation chip stacking: fully functional 2.5 V SOI CMOS devices fabricated at 400 °C. The devices match ...
Imec and Soitec have demo-ed a sequential 3D front-end integration process by stacking two device layers on one another on a 300mm wafer. This vertical integration of sequentially processed device ...
At this week’s IEEE IEDM 2018 conference, imec, the Leuven-based research and innovation hub has presented a first demonstration of 3D stacked FinFETs on 300mm wafers using a sequential integration ...
The institute will present nine papers during the conference this year. Two presentations will highlight a breakthrough in 3D sequential integration and results pushing GaN/Si HEMT closer to GaN/SiC ...
CEA-Leti at IEDM 2023 today described the world's-first 3D sequential integration (3DSI) of CMOS over CMOS with advanced metal line levels, which brings 3DSI with intermediate BEOL closer to ...
Imec has introduced the forksheet device architecture to extend the scalability of the nanosheet transistor family towards 1nm and beyond logic nodes. In a forksheet device, the effective channel ...
CEA-Leti and STMicroelectronics presented results at IEDM 2025 showcasing the key enablers for a new high-performance and versatile RF Si platform co-integrating best-in-class active and passive ...
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